The following sources provide fast-track training in the Verilog
Hardware Description Language. They are targeted mainly for experienced
VHDL designers with no Verilog knowledge who want to achieve basic Verilog
capabilities in order to participate in the SystemVerilog course.
These sources are not a replacement for a Basic Verilog course for
those who want to design in Verilog.
A one-day on-site seminar is also available.
Please contact us for details
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Upcomming courses:
Interesting links:
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